Intel Unveils More Details of Xeon 6 SoC at HotChips 2024 Conference

TapTechNews August 27th news, Intel introduced more details about the Xeon 6 SoC (code-named GraniteRapids-D) at the HotChips 2024 (HC36) academic conference held at Stanford University in the US from August 25th to 27th.

Intel reconfirmed its statement at MWC 2024 that the Xeon 6 SoC for the edge and telecommunications sectors will be launched next year.

Intel Unveils More Details of Xeon 6 SoC at HotChips 2024 Conference_0

The Xeon 6 SoC GraniteRapids-D combines the Xeon 6 compute die based on Intel3 process and the edge-optimized I/O die based on Intel4, and has achieved significant improvements in three aspects: performance, energy efficiency, and transistor density.

Intel Unveils More Details of Xeon 6 SoC at HotChips 2024 Conference_1

This SoC adopts a compatible BGA package and includes two sub-series of 4-channel memory (TapTechNews note: expected to correspond to a single compute die) and 8-channel memory (expected to correspond to a double compute die), and also supports MCRDIMM high-speed memory.

GraniteRapids-D can provide up to 32 PCIe5.0 channels, up to 16 PCIe4.0 channels, up to 16 CXL2.0 channels, and can be configured as a dual 100Gb Ethernet port.

Intel Unveils More Details of Xeon 6 SoC at HotChips 2024 Conference_2

In addition, the Xeon 6 SoC also has built-in accelerators such as MediaAccelerator, QAT, DLB, vRANBoost, DSA, and supports enhanced functions for the edge, including an extended operating temperature range and industrial-level reliability.

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