Intel recently introduced the technical details of the Intel3 process node on its official website as part of the 2024 IEEE VLSI Symposium event. Intel3 is Intel's last-generation FinFET transistor process, which has increased the number of steps using EUV compared to Intel4 and will also be a long-term family of process nodes providing foundry services, including basic Intel3 and three variant nodes.
The Intel3-E natively supports 1.2V high voltage and is suitable for the manufacture of analog modules; while the future Intel3-PT further enhances the overall performance and supports finer 9 μm pitch TSV and hybrid bonding.
Intel claims that as its ultimate FinFET process, Intel3-PT will become the mainstream choice in the future for many years and will be used by internal and external foundry customers along with angstrom-level process nodes.
Compared to the Intel4 process that only includes a 240nm high-performance library (Note by TapTechNews: HP library), Intel3 introduces a 210nm high-density (HD) library, providing more possibilities in the transistor performance orientation.
Intel says that its basic Intel3 process, when using the high-density library, can increase the frequency by up to 18% compared to the Intel4 process.
In addition, Intel also claims that the density of the basic version of Intel3 has also increased by 10%, achieving a full-node-level improvement.
For the metallization layer of the transistor, Intel3 provides two new options of 12+2 and 19+2 in addition to the 14+2 layers of Intel4, which are respectively for low-cost and high-performance applications.
In terms of each metal layer specifically, Intel has maintained the same spacing on key layers such as M0 and M1 in Intel3 as Intel4, mainly reducing the spacing of M2 and M4 from 45nm to 42nm.