Samsung Developing New 3.3D Packaging Tech for AI Chips by 2026

Samsung Electronics' AVP advanced packaging department is developing a new type of "3.3D" advanced packaging technology for AI semiconductor chips, aiming to achieve mass production by the second quarter of 2026, according to a recent report by Korean media ETNews on July 3rd.

The concept map provided by Korean media shows that this 3.3D packaging technology integrates multiple advanced heterogeneous integration technologies of Samsung Electronics.

Samsung Developing New 3.3D Packaging Tech for AI Chips by 2026_0

In the concept map, the GPU (AI computing chip) is vertically stacked on top of the LCC (Note by TapTechNews: that is, SRAM cache), and the two parts are bonded together, which is similar to Samsung Electronics' existing X-Cube 3DIC packaging technology.

Samsung Developing New 3.3D Packaging Tech for AI Chips by 2026_1

In the interconnection between the overall of GPU + LCC cache and the HBM memory, this 3.3D packaging technology has many similarities to the I-Cube E2.5 packaging technology:

Samsung Developing New 3.3D Packaging Tech for AI Chips by 2026_2

The overall of GPU + LCC cache and the HBM are located on the copper RDL redistribution interposer layer, and the direct connection between the dies is achieved by using silicon bridge chips, and the copper RDL redistribution layer is located above the substrate.

This design uses copper RDL redistribution layer to replace the silicon interposer whose price can be ten times that of the former in most positions, and only introduces silicon bridge in necessary parts.

According to the source close to Samsung Electronics, this design can reduce the production cost by 22% compared to the scheme of completely adopting silicon interposer without sacrificing the performance of the chip.

In addition, Samsung Electronics will also introduce panel-level (PLP) packaging in this 3.3D packaging technology to replace the area-limited circular wafer with a large square substrate to further improve packaging production efficiency.

Korean media believes that Samsung Electronics aims to create a new generation of 3.3D packaging technology with significant advantages in price and production efficiency, and capture more orders from fabless design enterprises in the advanced packaging foundry market currently dominated by TSMC.

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