The New UCIe2.0 Specification Revolutionizing Chiplet Interconnect
TapTechNews August 7th news, The Universal Chiplet Interconnect (UCIe) Industry Alliance has newly announced the UCIe2.0 specification, which supports a manageable standardized system architecture and comprehensively addresses the testability, manageability, and debugging (DFx) design challenges across multiple chiplets (from classification to field management) in the system-in-package (SiP) lifecycle.
The UCIe2.0 specification mainly introduces manageable functions (optional) and the UCIeDFx architecture (UDA), which can test, telemeter, and debug the management structure of each chiplet, achieving vendor-independent chip interoperability and providing a flexible and unified method for SiP management and DFx operations.
The UCIe2.0 specification also supports 3D packaging, which can provide higher bandwidth density and higher energy efficiency compared to 2D and 2.5D packaging architectures.
The UCIe-3D optimizes hybrid bonding with a bump pitch feature, and the bump pitch can be as large as 10-25 microns or as small as 1 micron or less to provide flexibility and scalability.
The UCIe2.0 specification another feature is the optimized packaging design for interoperability and compliance testing. The purpose of compliance testing is to verify the main band support function of the device under test (DUT) according to the known good reference UCIe implementation. UCIe2.0 establishes a preliminary framework for physical, adapter, and protocol compliance testing.
TapTechNews attaches the highlights of the UCIe2.0 specification as follows:
Full support for manageability, debugging, and testing of any system-in-package (SiP) structure with multiple chiplets.
Support for 3D packaging, significantly improving bandwidth density and energy efficiency.
Improve the system-level solution by defining manageability as part of the chip stack.
Optimize packaging design for interoperability and compliance testing.
Fully backward compatible with UCIe1.1 and UCIe1.0.
If you want to further understand the details of the UCIe2.0 specification, you can click here to read in-depth.