EfficientComputer's New Technology Stack and Future Outlook

TapTechNews May 23rd news, after EfficientComputer completed a $16 million (TapTechNews note: currently about 116 million Chinese yuan) seed round of financing in March this year, it claimed to build a全新 technology stack from compiler to silicon chip within 1 year.

The company's approach is to create a 'universal, post-Von Neumann era processor design that is not only easy to program but also extremely energy efficient'.

EfficientComputer's founder and CEO Brandon Lucia said:

Today's computers are horribly inefficient. The mainstream 'Von Neumann' processor design wastes 99% of the energy. Unfortunately, this inefficiency has been deeply integrated into their design.

In Von Neumann processors, programs are composed of a series of simple instructions, but running programs by simple instructions is unacceptably slow.

To improve efficiency, we must fundamentally rethink how we design computers.

The architecture developed by the company does not execute a series of instructions like the Von Neumann design, but expresses the program in the form of a 'circuit of instructions', showing which instructions can communicate with each other. This design is called the Fabric processor architecture and has been implemented in the Monza test SoC.

Lucia was recently interviewed by European eeNews and explained the company's approach in more detail. TapTechNews translated the relevant content as follows:

Different from mainstream chips in essence, our architecture is based on the research of Carnegie Mellon University, and at the same time developed a compiler and software stack. We considered universality in the design.

We don't need register flows and we don't need instruction fetches every cycle. A subset of the tiles is also a memory access tile - this is an efficient way of memory structure design.

The initial performance of the chip is 1.3 to 1.5 TOPS/W, and the power consumption is 500 mW to 600 mW, but this is actually just the beginning.

In early 2025, we can reach 100 GOPS at a frequency of 200 MHz, and we think we can improve the performance by 10 to 100 times without changing the power consumption.