The Third-Generation

TapTechNews August 24th news, RISC-V is leading a new round of processor chip technology and industrial transformation. The third-generation Xiangshan open-source high-performance RISC-V processor core developed by the Institute of Computing Technology, Chinese Academy of Sciences and the Beijing Open Source Chip Research Institute has become the strongest and most active RISC-V processor core in the international open source community.

During the 4th RISC-V China Summit (RVSC2024) held from August 19th to 25th, developers successfully ran Yun · Genshin Impact on the South Lake development board demonstrated by the Beijing Open Source Chip Research Institute.

TapTechNews note: Xiangshan names each generation of architecture with lakes - the first-generation architecture is Yanqi Lake, the second-generation architecture is South Lake, and the third-generation architecture is Kunming Lake.

According to public information, the second-generation Xiangshan processor (South Lake) supports the RV64GCBK instruction set, is manufactured using the 14nm process of SMIC, the V1 version was taped out in November 2023, and the frequency reaches 2 GHz at the 14nm process node; the V2 version includes improved designs such as MBIST, and was taped out in April 2023, and the wafer was returned and successfully booted Linux in October 2023.

On August 24, 2022, the Institute of Computing Technology of the Chinese Academy of Sciences, the Beijing Open Source Chip Research Institute, Tencent, Alibaba, ZTE, Zhongke Chuangda, ESWIN, and Sunway Microelectronics formed a joint R & D team to carry out the joint development of the third-generation Xiangshan (Kunming Lake).

In the major achievements release session of the opening ceremony of the 2024 Zhongguancun Forum Annual Meeting held in April this year, a number of major scientific and technological achievements appeared collectively. The third-generation Xiangshan RISC-V open-source high-performance processor core debuted, representing that China's RISC-V processor core performance has entered the global first echelon.

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The third-generation 'Xiangshan' RISC-V open-source high-performance processor core debuts, and the performance enters the global first echelon.