Samsung Leads in Semiconductor Packaging, Ahead of TSMC in PLP
TapTechNews June 27, it is reported by the Korean media BusinessKorea that on June 24, Samsung Electronics has made significant progress in the semiconductor packaging industry and will take the lead in stepping into the Panel-Level Packaging (PLP) field ahead of TSMC.
The former head of Samsung Electronics' Semiconductor (DS) division, Kyung Kye-hyun, attended the general shareholders' meeting in March this year and elaborated in detail on the necessity of implementing the PLP technology. He explained: The size of AI semiconductor chips (rectangular parts with circuits) is usually 600mm by 600mm or 800mm by 800mm, so technologies like PLP are needed. Samsung is currently actively developing and strengthening cooperation with customers.
TapTechNews reported on June 20 that TSMC is researching a new advanced chip packaging method, using rectangular substrates instead of traditional round wafers to place more chips on each wafer.
According to sources, the rectangular substrate is currently in the experiment stage, with a size of 510mm by 515mm, and the usable area is more than three times that of a round wafer. Using a rectangle means there will be less unused area remaining at the edges.
NikkeiAsia pointed out in the report: TSMC's research is still in the early stage, and mass production is expected to take several years. Although TSMC was previously skeptical about using rectangular printed circuit boards, its entry into the research field means an important technological shift.
The market research company IDC reported that if Nvidia is to complete its AI semiconductor orders, it needs half of TSMC's CoWoS capacity, but only about one-third can actually be fulfilled currently.
TSMC plans to more than double the capacity of this process by the end of the year; however, the competition from fabless companies such as AMD and Broadcom for TSMC's CoWoS production makes this goal challenging.
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It is reported that TSMC is researching a new advanced chip packaging technology: Rectangular instead of round wafers.