JEDEC to Finalize HBM4 Standard with Enhanced Performance

TapTechNews July 11th news, the industry standards-setting organization JEDEC Solid State Technology Association released a press release yesterday (July 10th) stating that the HBM4 standard is about to be finalized. In addition to higher bandwidth, lower power consumption, and enhanced die / stack performance, it further increases the data processing rate.

JEDEC said that in the fields of generative artificial intelligence (AI), high-performance computing, high-end graphics cards and servers, these improvements are crucial for applications that require efficient processing of large data sets and complex computations.

TapTechNews noticed from the press release that compared to HBM3, the number of channels per stack of HBM4 has doubled and the physical size is larger. In order to support device compatibility, the main controller can handle both HBM3 and HBM4 simultaneously.

The HBM4 will specify 24Gb and 32Gb layers and provide 4-high, 8-high, 12-high and 16-high TSV stacks. The committee has preliminarily agreed to a speed of up to 6.4 Gbps and is discussing higher frequencies.