SiPearl Updates Arm Processor Rhea1 Specifications for 2025 Sample Release

TapTechNews reported on May 15th that chip design company SiPearl updated the specifications of the Arm architecture processor Rhea1 at the 2024 ISC International Supercomputing Conference and announced that the chip is planned to be sampled in 2025. According to previous reports by TapTechNews, the Rhea1 processor, along with the NVIDIA GH200 Grace Hopper super chip, will provide computing power for the first European E-level supercomputer JUPITER. The processor was originally planned to use 72 Arm Neoverse V1 'Zeus' cores. The deployment of the JUPITER system, originally scheduled for 2024, now appears to be delayed. The new version of the Rhea1 processor retains similar underlying technologies to the original design (such as still using Neoverse V1 cores), but has been upgraded in various aspects. The new Rhea1 processor will increase the number of cores from 72 to 80, with each core including a pair of 256-bit SVE vector units. Each Rhea1 processor will be equipped with 4 HBM2E memory stacks from Samsung Electronics, and will also support 4-channel DDR5 memory, with each memory channel supporting 2 DIMM memories. The Rhea1 processor will support 104 PCIe Gen 5 lanes, including 6 groups of x16 channels and 2 groups of x4 channels. The processor will continue to use the Arm Neoverse CMN-700 on-chip interconnect network introduced in 2021. Philippe Notton, CEO and founder of SiPearl, stated: 'Rhea1 will be a world-class microprocessor for HPC and AI inference. In the rapidly growing generative AI market, it will be an excellent alternative to existing AI inference workload solutions: lower cost, while providing higher flexibility for model changes.'

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