TSMC's 2nm Node Progress and Future Plans

TapTechNews May 24th news, according to Taiwan media 'MoneyDJ Financial Network' report, TSMC executives said at the 2024 Technology Forum Hsinchu session that its 2nm node using Nanosheet nano-sheets (GAA transistors) is progressing smoothly.

TSMC co-deputy COO Zhang Xiaoqiang said that the progress of TSMC's 2nm process is'very smooth': Currently, the 'conversion performance' of nano-sheets has reached 90% of the target, and it has also exceeded 80% in terms of yield.

TSMC believes that when its N2 process is launched in 2025, it will continue to be the most leading technology in the foundry industry.

According to the collation of foreign media Anandtech, TSMC will achieve mass production of the N2 process in the second half of 2025, and at the same time will also bring the N3X process in the 3nm family for HPC applications. The N3X process has a higher maximum voltage of 1.2V. Compared with the N3P process, it reduces power consumption by 7% at the same frequency, increases performance by 5% at the same area, and increases density by 10% at the same frequency. According to a previous report by TapTechNews, this node is expected to start receiving wafers this year.

In the second half of 2026, TSMC will mass produce two 2nm family variant processes: N2P and A16.

The N2P process will reduce power consumption by 5-10% at the same frequency and density compared to the N2 process, and increase performance by 5-10% at the same density and power consumption.

At the A16 node, TSMC will officially introduce the backside power supply technology. This process can increase the frequency by 8-10% at the same working voltage; reduce power consumption by 15-20% at the same frequency, and increase density by up to 10%.