Synopsys Launches First Complete PCIe 7.0 IP Solution

TapTechNews on June 12, Synopsys recently announced the launch of the industry's first complete PCIe 7.0 IP solution, covering PCIe controller, IDE security module, PHY, and verification IP.

TapTechNews learned that the PCIe 7.0 specification is currently in the formal first draft (version 0.5) stage and is still expected to be fully released within 2025.

The IP solution of Synopsys can achieve a maximum bidirectional secure data transfer of 512 GB/s in the x16 link configuration to ease the interconnection bandwidth bottleneck among multiple AI computing devices.

According to Synopsys, its PCIe 7.0 controller and PHY have improved energy efficiency by 50% compared to previous products.

John Koeter, senior vice president of IP marketing and strategy of Synopsys, said:

As the leading provider of interface IP, Synopsys will continue to provide designers with the latest interfaces of the most advanced nodes to help them meet the needs of computing-intensive designs.

The PCIe 7.0 IP of Synopsys will provide customers with a complete solution based on standards, enabling them to start the next-generation HPC and AI designs early and accelerating the path to chip success.

The PCIe 7.0 verification IP of Synopsys is now on the market, and the corresponding version of the controller, IDE security module, and PHY will be fully available in early 2025.