Open Source Chip Institute Releases World's First NoC IP

TapTechNews, May 23rd. The Beijing Open Source Chip Research Institute (referred to as the Open Core Institute) officially announced today that on May 21, 2024, the Open Core Institute officially released the world's first open source large-scale Network-on-Chip (NoC) IP - the R & D code name Wenyu River through an online conference. This major breakthrough marks a solid step forward for the Open Core Institute in promoting the development of data center server chip technology.

Open Source Chip Institute Releases Worlds First NoC IP_0

It is introduced that as the core basic IP for data center server chips in addition to high-performance processor cores, NoC currently has only one supplier, ARM, and restricts the use of RISC-V processor cores to a certain extent.

Since the project was established, the Open Core Institute has successfully completed the development and verification of the NoC IP supporting 64-core interconnection after 18 months of intense development. Currently, this NoC IP can be delivered to enterprises for evaluation, further promoting the development of the RISC-V ecosystem.

As a result, the Open Core Institute can provide the most important core basic IP for data center server CPU chips, the Xiangshan high-performance processor core and the Wenyu River large-scale on-chip interconnection network. This is also the first time in the world that the construction of data center server CPU chips can be completed based on an open source project.

Open Source Chip Institute Releases Worlds First NoC IP_1

The launch conference attracted about 100 engineers from more than 20 RISC-V chip enterprises across the country.

TapTechNews found out that in order to develop the RISC-V ecosystem, Beijing and the Chinese Academy of Sciences organized a number of domestic industry leading enterprises and top scientific research units to initiate the establishment of the Open Core Institute on December 6, 2021. The Open Core Institute is committed to accelerating the integration of the RISC-V innovation chain and industrial chain, and strives to initially build an open source chip technology system by 2025, and become a world-leading RISC-V industrial ecological center by 2030.

Open Source Chip Institute Releases Worlds First NoC IP_2

The researcher of the Institute of Computing Technology, Chinese Academy of Sciences, and the main person in charge of the Xiangshan RISC-V open source processor, Bao Yungang, said:

High-end processor chips contain two core IPs: one is the CPU Core responsible for computing, such as the V1/N1/V2/N2 cores in the ARM Neoverse series; the other is the on-chip network NoC (Network-on-Chip) that interconnects dozens to hundreds of processor cores, which can be regarded as the bridge inside the chip, such as the ARM CMN-600/700 series IP.

The Xiangshan high-performance RISC-V processor core is the first type of IP mentioned above, and has now developed to the third generation, and its performance can reach that of ARM N2, which was just released at the Zhongguancun Forum some time ago. But for the second type of NoC IP, especially the single-chip hundred-core level NoC, currently only the ARM CMN series is available in the world (the Arteris Flex NoC series has no examples yet), and the single authorization price is as high as hundreds of millions of RMB, and there are also many restrictive clauses.

The design and implementation of large-scale on-chip interconnection network NoC is extremely difficult (especially the cache consistency problem), and has become a shortcoming of the global RISC-V ecosystem. In order to change this situation, in 2022, the Open Core Institute started the first-generation NoC Wenyu River project, led by Teacher Wang Qi to be responsible for the R & D work, and received the support of many enterprises. After 18 months of R & D, the development and verification of the NoC IP supporting 64-core interconnection have been successfully completed and released online on May 21. About 100 engineers from more than 20 RISC-V chip enterprises across the country participated and received wide attention.

Now the R & D work of the second-generation NoC has also been started, which will form a tighter adaptation and optimization with the Xiangshan core, and better support the interconnection and expansion of AI accelerators. Looking forward to more enterprises' support and participation.

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[Wenyu River] is located in the northeastern part of Beijing, originating from the Jundu foothills in Changping District, Beijing, with a total length of 47.5 miles. Wenyu River is an important river that was developed relatively early in Beijing's history. As the shipping water source of the North Canal and the waterway for漕运 in the northern part of the capital, it has played an important role in history. Wenyu River was not only the漕运 thoroughfare of past dynasties, but also because of its clean and clear water quality, it was also the imperial court, garden, and lake's exclusive water.

Open Source Chip Institute Releases Worlds First NoC IP_3

Previously, at the major achievement release session of the opening ceremony of the 2024 Zhongguancun Forum Annual Conference on April 25, a number of major scientific and technological achievements appeared collectively. The third-generation Xiangshan RISC-V open source high-performance processor core was unveiled, and its performance entered the world's first echelon.

Open Source Chip Institute Releases Worlds First NoC IP_4

Bao Yungang also revealed that Chinese researchers are also developing an open source DDR controller.

Open Source Chip Institute Releases Worlds First NoC IP_5

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